3629 search results - page 9 / 726 » A Network Memory Architecture Model and Performance Analysis |
SAC
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
ISCA
2003
IEEE
14 years 28 days ago
2003
IEEE
Trends in microprocessors of increasing die size and clock speed and decreasing feature sizes have fueled rapidly increasing performance. However, the limited improvements in DRAM...
NPC
2005
Springer
14 years 1 months ago
2005
Springer
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
ACMMSP
2005
ACM
14 years 1 months ago
2005
ACM
Combining ideas from several previous proposals, such as Active Pages, DIVA, and ULMT, we present the Memory Arithmetic Unit and Interface (MAUI) architecture. Because the “inte...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE