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» A New Approach for Low Power Scan Testing
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DAC
1997
ACM
13 years 11 months ago
ATPG for Heat Dissipation Minimization During Scan Testing
An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
Seongmoon Wang, Sandeep K. Gupta
IROS
2007
IEEE
109views Robotics» more  IROS 2007»
14 years 1 months ago
A new approach to segmentation of 2D range scans into linear regions
— Toward obtaining a compact and multiresolution representation of 2D range scans, a wavelet framework is proposed for encoding an orientation measure called Running Angle (RA). ...
Ahad Harati, Roland Siegwart
TC
2008
13 years 7 months ago
Low-Transition Test Pattern Generation for BIST-Based Applications
A low-transition test pattern generator, called the low-transition linear feedback shift register (LT-LFSR), is proposed to reduce the average and peak power of a circuit during te...
Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed
ICCD
2006
IEEE
127views Hardware» more  ICCD 2006»
14 years 4 months ago
Power Droop Testing
Circuit activity is a function of input patterns. When circuit activity changes abruptly, it can cause sudden drop or rise in power supply voltage. This change is known as power d...
Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd...
VTS
2000
IEEE
126views Hardware» more  VTS 2000»
13 years 11 months ago
Static Compaction Techniques to Control Scan Vector Power Dissipation
Excessive switching activity during scan testing can cause average power dissipation and peak power during test to be much higher than during normal operation. This can cause prob...
Ranganathan Sankaralingam, Rama Rao Oruganti, Nur ...