29 search results - page 4 / 6 » A New Crosstalk Noise Model for DOMINO Logic Circuits |
ISQED
2003
IEEE
14 years 8 days ago
2003
IEEE
- This paper investigates important problems involved in the design of a CML buffer as well as a chain of tapered CML buffers. A new design procedure to systematically design a cha...
ISLPED
2000
ACM
13 years 11 months ago
2000
ACM
A new high-speed Domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-o between performance and noise margins in conventional CD-Domino logic while dissipat...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
ISCAS
2005
IEEE
14 years 18 days ago
2005
IEEE
— A new operation mode using a partially depleted hybrid lateral BJT-CMOS inverter on SOI, named as a new unified-BiCMOS (U-BiCMOS) inverter, is proposed. The scheme utilizes the...
TCAD
2010
13 years 1 months ago
2010
Crosstalk faults have emerged as a significant mechanism for circuit failure. Long signal nets are of particular concern because they tend to have a higher coupling capacitance to...