4 search results - page 1 / 1 » A New Family of High.Performance Parallel Decimal Multiplier... |
ARITH
2007
IEEE
14 years 5 months ago
2007
IEEE
This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry–save multioperand addition that us...
BMCBI
2010
13 years 11 months ago
2010
Background: There is an increasing demand to assemble and align large-scale biological sequence data sets. The commonly used multiple sequence alignment programs are still limited...
IPPS
2007
IEEE
14 years 5 months ago
2007
IEEE
Network performance measurement and prediction is very important to predict the running time of high performance computing applications. The LogP model family has been proven to b...
TPDS
2010
13 years 9 months ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...