In this paper, we present a new logic synthesis method for PLA with 2-input logic elements. A PLA with 2-input logic elements can achieve low-power dissipation and high-speed oper...
: This paper presents a synthesis algorithm for pipelined circuits. The circuit is specified as a collection of independent, looselycoupled modules connected by queues. The synthe...
Development of new transport protocols or protocol algorithms suffers from the complexity of the envir onment in which they ar e intended to run. Modeling techniques attempt to av...
Level set methods have been widely used in image processing and computer vision. In conventional level set formulations, the level set function typically develops irregularities du...
Chunming Li, Chenyang Xu, Changfeng Gui, Martin D....
—Coordinated Checkpoint/Restart (C/R) is a widely deployed strategy to achieve fault-tolerance. However, C/R by itself is not capable enough to meet the demands of upcoming exasc...