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» A New Method for Design of Robust Digital Circuits
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ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
14 years 3 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
MEDIAFORENSICS
2010
13 years 10 months ago
Forensic hash for multimedia information
Digital multimedia such as images and videos are prevalent on today's internet and cause significant social impact, which can be evidenced by the proliferation of social netw...
Wenjun Lu, Avinash L. Varna, Min Wu
DAC
2004
ACM
14 years 29 days ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
MOBIHOC
2012
ACM
11 years 11 months ago
EV-Loc: integrating electronic and visual signals for accurate localization
Nowadays, an increasing number of objects can be represented by their wireless electronic identifiers. For example, people can be recognized by their phone numbers or their phone...
Boying Zhang, Jin Teng, Junda Zhu, Xinfeng Li, Don...
HOST
2008
IEEE
14 years 3 months ago
Hardware Trojan Detection Using Path Delay Fingerprint
—Trusted IC design is a recently emerged topic since fabrication factories are moving worldwide in order to reduce cost. In order to get a low-cost but effective hardware Trojan ...
Yier Jin, Yiorgos Makris