945 search results - page 17 / 189 » A New Method for Design of Robust Digital Circuits |
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
With shrinking technology, the timing variation of a digital circuit is becoming the most important factor while designing a functionally reliable circuit. Gate sizing has emerged...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
We introduce the first approach that can actively control multiple hardware intellectual property (IP) cores used in an integrated circuit (IC). The IP rights owner(s) can remotel...
ICCD
2000
IEEE
14 years 4 months ago
2000
IEEE
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
INFSOF
2006
13 years 7 months ago
2006
In finite state machine (FSM) based testing, the problem of fault masking in the unique input/output (UIO) sequence may degrade the test performance of the UIO based methods. This...