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» A New Method for Design of Robust Digital Circuits
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DSD
2005
IEEE
75views Hardware» more  DSD 2005»
14 years 2 months ago
An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform
We describe a new e-learning environment and a runtime platform for educational tools on digital system testing and design for testability. This environment is being developed in ...
Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogub...
CDC
2008
IEEE
126views Control Systems» more  CDC 2008»
14 years 3 months ago
Design of robust decentralized controllers for drag-free satellite
Abstract— In this paper the problem of designing a decentralized robust controller for a plant describing a dragfree satellite is addressed. From recent experiences in dragfree c...
Lorenzo Pettazzi, Alexander Lanzon, Stephan Theil
VLSID
2007
IEEE
131views VLSI» more  VLSID 2007»
14 years 9 months ago
Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
Maryam Ashouei, Muhammad Mudassar Nisar, Abhijit C...
DAC
2006
ACM
14 years 10 months ago
State encoding of large asynchronous controllers
A novel method to solve the state encoding problem in Signal Transition Graphs is presented. It is based on the structural theory of Petri nets and can be applied to large specifi...
Josep Carmona, Jordi Cortadella
ICCAD
2003
IEEE
114views Hardware» more  ICCAD 2003»
14 years 6 months ago
A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning
As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms also grows. In this work we introduce Traffic, a new method for creating wire- a...
Peter G. Sassone, Sung Kyu Lim