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» A New Method for Design of Robust Digital Circuits
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DAC
2010
ACM
13 years 9 months ago
Parallel multigrid preconditioning on graphics processing units (GPUs) for robust power grid analysis
Leveraging the power of nowadays graphics processing units for robust power grid simulation remains a challenging task. Existing preconditioned iterative methods that require inco...
Zhuo Feng, Zhiyu Zeng
GECCO
2007
Springer
158views Optimization» more  GECCO 2007»
14 years 3 months ago
Using group selection to evolve leadership in populations of self-replicating digital organisms
This paper describes a study in the evolution of distributed cooperative behavior, specifically leader election, through digital evolution and group selection. In digital evoluti...
David B. Knoester, Philip K. McKinley, Charles Ofr...
ISCAS
2008
IEEE
259views Hardware» more  ISCAS 2008»
14 years 3 months ago
A 2.4-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit
—this paper reports a PFD/CP linearization technique and a new charge pump circuit to enhance the performance of a delta-sigma (∆Σ) fractional-N PLL. The proposed method impro...
Ching-Lung Ti, Yao-Hong Liu, Tsung-Hsien Lin
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
13 years 11 months ago
Substrate resistance extraction with direct boundary element method
- It is important to model the substrate coupling for mixed-signal circuit designs today. This paper presents the direct boundary element method (BEM) for substrate resistance calc...
Xiren Wang, Wenjian Yu, Zeyi Wang
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
14 years 3 months ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening