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IPPS
2002
IEEE
14 years 1 months ago
Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leon...
ICPP
2008
IEEE
14 years 3 months ago
Scalable Dynamic Load Balancing Using UPC
An asynchronous work-stealing implementation of dynamic load balance is implemented using Unified Parallel C (UPC) and evaluated using the Unbalanced Tree Search (UTS) benchmark ...
Stephen Olivier, Jan Prins
CLUSTER
2008
IEEE
14 years 3 months ago
DLM: A distributed Large Memory System using remote memory swapping over cluster nodes
Abstract—Emerging 64bitOS’s supply a huge amount of memory address space that is essential for new applications using very large data. It is expected that the memory in connect...
Hiroko Midorikawa, Motoyoshi Kurokawa, Ryutaro Him...
CLUSTER
2008
IEEE
14 years 3 months ago
High message rate, NIC-based atomics: Design and performance considerations
—Remote atomic memory operations are critical for achieving high-performance synchronization in tightly-coupled systems. Previous approaches to implementing atomic memory operati...
Keith D. Underwood, Michael Levenhagen, K. Scott H...
IPPS
1998
IEEE
14 years 1 months ago
Managing Concurrent Access for Shared Memory Active Messages
Passing messages through shared memory plays an important role on symmetric multiprocessors and on Clumps. The management of concurrent access to message queues is an important as...
Steven Lumetta, David E. Culler