73 search results - page 4 / 15 » A New Pipelined Array Architecture for Signed Multiplication |
CAIP
1997
Springer
13 years 11 months ago
1997
Springer
: A new hardware structure for implementation of soft morphological filters is presented in this paper. This is based on the modification of the majority gate technique. A pipeline...
ISCA
2003
IEEE
14 years 7 days ago
2003
IEEE
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
AINA
2008
IEEE
14 years 1 months ago
2008
IEEE
—Network Intrusion Detection System (NIDS) is a system developed for identifying attacks by using a set of rules. NIDS is an efficient way to provide the security protection for ...
FPGA
2004
ACM
14 years 11 days ago
2004
ACM
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
TVLSI
2008
13 years 6 months ago
2008
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...