104 search results - page 3 / 21 » A New Reactive Processor with Architectural Support for Cont... |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
EMSOFT
2003
Springer
14 years 23 days ago
2003
Springer
Abstract. In this paper, we explain mechanisms for providing embedded network processors and other low-level programming environments with light-weight support for safe resource sh...
CODES
2000
IEEE
13 years 12 months ago
2000
IEEE
—Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50...
WCAE
2006
ACM
14 years 1 months ago
2006
ACM
At Northeastern University we are building a number of courses upon a common embedded systems platform. The goal is to reduce the learning curve associated with new architectures ...