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IPPS
2010
IEEE
13 years 7 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
SIPS
2008
IEEE
14 years 3 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
SCCC
1999
IEEE
14 years 1 months ago
Safe-Threads: A New Model for Object-Oriented Multi-Threaded Languages
Threads have been present in programming languages for some time now. However, they have a bad image among software developers because they lead to unreliable applications. Most o...
Luis Mateu, José M. Piquer
EUC
2005
Springer
14 years 2 months ago
The Performance Estimation of the Situation Awareness RFID System from Ubiquitous Environment Scenario
Many sensors providing situation data will be in everywhere under the ubiquitous environment. It requires the current RFID system should be extended to recognize and use situation ...
Dongwon Jeong, Heeseo Chae, Hoh Peter In
ICCAD
2003
IEEE
142views Hardware» more  ICCAD 2003»
14 years 6 months ago
Energy Optimization of Distributed Embedded Processors by Combined Data Compression and Functional Partitioning
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
Jinfeng Liu, Pai H. Chou