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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 1 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
ICDE
2007
IEEE
103views Database» more  ICDE 2007»
14 years 9 months ago
TCAM-conscious Algorithms for Data Streams
Recently, there has been significant interest in developing space and time efficient solutions for answering continuous summarization queries over data streams. While these techni...
Nagender Bandi, Ahmed Metwally, Divyakant Agrawal,...
DAC
2002
ACM
14 years 8 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
RTAS
2008
IEEE
14 years 2 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
ICEBE
2005
IEEE
165views Business» more  ICEBE 2005»
14 years 1 months ago
Distributed Policy Specification and Enforcement in Service-Oriented Business Systems
Service-Oriented Computing (SOC) and Web Services (WS) provide a flexible computing platform for electronic business and commerce. Introducing policy-based computing to service-or...
Wei-Tek Tsai, Xinxin Liu, Yinong Chen