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» A Note on Designing Logical Circuits Using SAT
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ASIAMS
2008
IEEE
14 years 1 months ago
High-Performance Carry Select Adder Using Fast All-One Finding Logic
A carry-select adder(CSA) can be implemented by using single ripple carry adder and an add-one circuit instead of using dual ripple-carry adders to reduce the area and power but w...
Sun Yan, Zhang Xin, Jin Xi
FSKD
2007
Springer
98views Fuzzy Logic» more  FSKD 2007»
14 years 1 months ago
New Components for Building Fuzzy Logic Circuits
This paper presents two new designs of fuzzy logic circuit components. Currently due to the lack of fuzzy components, many fuzzy systems cannot be fully implemented in hardware. W...
Ben Choi, K. Tipnis
ISVLSI
2008
IEEE
136views VLSI» more  ISVLSI 2008»
14 years 1 months ago
CMOS Control Enabled Single-Type FET NASIC
A new hybrid CMOS-nanoscale circuit style has been developed that uses only one type of Field Effect Transistor (FET) in the logic portions of a design. This is enabled by CMOS pro...
Pritish Narayanan, Michael Leuchtenburg, Teng Wang...
MJ
2008
58views more  MJ 2008»
13 years 7 months ago
Using multi-threshold threshold gates in RTD-based logic design: A case study
Abstract - The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the conventional Boolean gates (AND, OR, NAND, NOR) due...
Héctor Pettenghi, Maria J. Avedillo, Jos&ea...
FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
13 years 11 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil