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» A Note on Designing Logical Circuits Using SAT
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SAT
2004
Springer
111views Hardware» more  SAT 2004»
13 years 12 months ago
A Note on Satisfying Truth-Value Assignments of Boolean Formulas
Abstract. In this paper we define a class of truth-value assignments, called bounded assignments, using a certain substitutional property. We show that every satisfiable Boolean ...
Zbigniew Stachniak
GLVLSI
2010
IEEE
209views VLSI» more  GLVLSI 2010»
13 years 11 months ago
Enhancing debugging of multiple missing control errors in reversible logic
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
Jean Christoph Jung, Stefan Frehse, Robert Wille, ...
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
13 years 10 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
SAT
2007
Springer
184views Hardware» more  SAT 2007»
14 years 21 days ago
Circuit Based Encoding of CNF Formula
In this paper a new circuit sat based encoding of boolean formula is proposed. It makes an original use of the concept of restrictive models introduced by Boufkhad to polynomially ...
Gilles Audemard, Lakhdar Sais
MJ
2007
87views more  MJ 2007»
13 years 6 months ago
Using SAT-based techniques in power estimation
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
Assim Sagahyroon, Fadi A. Aloul