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» A Note on Designing Logical Circuits Using SAT
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VLSID
2007
IEEE
210views VLSI» more  VLSID 2007»
14 years 8 months ago
Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
Phillip H. Jones, Young H. Cho, John W. Lockwood
MONET
2007
111views more  MONET 2007»
13 years 7 months ago
Resource Discovery in Activity-Based Sensor Networks
— This paper proposes a service discovery protocol for sensor networks that is specifically tailored for use in humancentered pervasive environments. It uses the high-level conc...
Doina Bucur, Jakob E. Bardram
DAC
1996
ACM
14 years 5 days ago
Hot-Carrier Reliability Enhancement via Input Reordering and Transistor Sizing
Hot-carrier eects and electromigration are the two important failure mechanisms that signi cantly impact the long-term reliability of high-density VLSI ICs. In this paper, we prese...
Aurobindo Dasgupta, Ramesh Karri
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
14 years 9 days ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
EH
2002
IEEE
105views Hardware» more  EH 2002»
14 years 29 days ago
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic
The availability of SiGe HBT devices has opened the door for Gigahertz FPGAs. Speeds over 5GHz have been reported. However, to make the idea practical, serious power management an...
Channakeshav, Kuan Zhou, Russell P. Kraft, John F....