522 search results - page 85 / 105 » A Note on Designing Logical Circuits Using SAT |
CDES
2008
13 years 9 months ago
2008
In this paper an algorithm is proposed for the synthesis and exact minimization of ESCT (Exclusive or Sum of Complex Terms) expressions for Boolean functions of up to seven comple...
INTEGRATION
2008
13 years 8 months ago
2008
In this paper an efficient algorithm for the synthesis and exact minimization of ESCT(Exclusive or Sum of Complex Terms) expressions for Boolean functions of at most six variables...
FPGA
2001
ACM
14 years 15 days ago
2001
ACM
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
Despite the progress of the last decades in electronic design automation, arithmetic circuits have always received way less attention than other classes of digital circuits. Logic...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- In this paper, we study the relationship between C4 package resonance effects and logical switching timing correlations, which has not been thoroughly investigated in the past. W...