522 search results - page 96 / 105 » A Note on Designing Logical Circuits Using SAT |
GECCO
2008
Springer
13 years 9 months ago
2008
Springer
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
ISQED
2011
IEEE
12 years 11 months ago
2011
IEEE
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
GI
2009
Springer
14 years 17 days ago
2009
Springer
: Future nano scale devices will expose different characteristics than todays silicon devices. While the exponential growth of non recurring expenses (NRE, mostly due to mask sets)...
FPL
2007
Springer
14 years 2 months ago
2007
Springer
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific informatio...