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» A Novel Approach for EMI Design of Power Electronics
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ERSA
2008
145views Hardware» more  ERSA 2008»
13 years 9 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
CODES
2011
IEEE
12 years 7 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
ASPDAC
2006
ACM
127views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Memory size computation for multimedia processing applications
– In real-time multimedia processing systems a very large part of the power consumption is due to the data storage and data transfer. Moreover, the area cost is often largely dom...
Hongwei Zhu, Ilie I. Luican, Florin Balasa
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
14 years 1 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
GLOBECOM
2007
IEEE
14 years 2 months ago
Frequency Agile Interference-Aware Channel Sounding for Dynamic Spectrum Access Networks
— In this paper, we propose a novel channel sounding technique, called the multicarrier direct sequence swept time delay cross-correlation (MC-DS-STDCC), which is designed to min...
Qi Chen, Alexander M. Wyglinski, Gary J. Minden