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» A Novel Method to Improve the Test Efficiency of VLSI Tests
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DATE
2008
IEEE
102views Hardware» more  DATE 2008»
14 years 2 months ago
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew...
IROS
2006
IEEE
127views Robotics» more  IROS 2006»
14 years 1 months ago
A Pilot Study on Teleoperated Mobile Robots in Home Environments
– Mobile robots operating in home environments must deal with constrained space and a great variety of obstacles and situations to handle. This article presents a pilot study aim...
Daniel Labonte, François Michaud, Patrick B...
IPPS
1998
IEEE
13 years 11 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Timing-Aware Decoupling Capacitance Allocation in Power Distribution Networks
Power supply noise increases the circuit delay, which may lead to performance failure of a design. Decoupling capacitance (decap) addition is effective in reducing the power suppl...
Sanjay Pant, David Blaauw
ATAL
2010
Springer
13 years 8 months ago
MagneBike: toward multi climbing robots for power plant inspection
An ever-growing infrastructure, including existing and newly built power plants, as well as a rising environmental awareness in society call for inspection and maintenance systems...
Andreas Breitenmoser, Fabien Tâche, Gilles C...