139 search results - page 25 / 28 » A Novel Universal Sequencer Hardware |
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
IPPS
2000
IEEE
13 years 11 months ago
2000
IEEE
We propose a novel work partitioning technique, Image Layer Decomposition (ILD), designed specifically to support distributed real-time rendering on commodity clusters. ILD has s...
VR
2000
IEEE
13 years 11 months ago
2000
IEEE
Due to the rapid evolution of graphics hardware, interactive 3D graphics is becoming popular on desktop personal computers. However, it remains a challenging task for a novice use...
ICRA
1999
IEEE
13 years 11 months ago
1999
IEEE
The goal of the Architecture for Agile Assembly AAA is to enable rapid deployment and recon guration of automated assembly systems through the use of cooperating, modular, robust,...
CGF
2006
13 years 7 months ago
2006
Level-of-detail modeling is a vital representation for real-time applications. To support texture mapping progressive meshes (PM), we usually allow the whole PM sequence to share ...