Sciweavers

471 search results - page 12 / 95
» A Parallel Hardware Architecture for Image Feature Detection
Sort
View
CONCURRENCY
2004
151views more  CONCURRENCY 2004»
13 years 8 months ago
User transparency: a fully sequential programming model for efficient data parallel image processing
Although many image processing applications are ideally suited for parallel implementation, most researchers in imaging do not benefit from high performance computing on a daily b...
Frank J. Seinstra, Dennis Koelma
IEEEPACT
2009
IEEE
14 years 3 months ago
Mapping Out a Path from Hardware Transactional Memory to Speculative Multithreading
— This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithread...
Leo Porter, Bumyong Choi, Dean M. Tullsen
ICASSP
2011
IEEE
13 years 10 days ago
Polar randomized hough transform for lane detection using loose constraints of parallel lines
In this paper, we propose a new methodology for detecting lane markers that exploits the parallel nature of lane boundaries on the road. First, the input image is pre-processed an...
Amol Borkar, Monson Hayes, Mark T. Smith
ACII
2005
Springer
14 years 2 months ago
Sketch Based Facial Expression Recognition Using Graphics Hardware
In this paper, a novel system is proposed to recognize facial expression based on face sketch, which is produced by programmable graphics hardware-GPU(Graphics Processing Unit). Fi...
Jiajun Bu, Mingli Song, Qi Wu, Chun Chen, Cheng Ji...
DELOS
2000
13 years 10 months ago
SMP and Cluster Architectures for Retrieval of Images in Digital Libraries
: This paper presents an overview over parallel architectures for the efficient realisation of digital libraries by considering image databases as an example. The state of the art ...
Odej Kao