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ASPLOS
2008
ACM
13 years 10 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
14 years 2 months ago
Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)
In this paper we analyze a 3D image rendering algorithm and the different mapping schemes to implement it in a SIMD reconfigurable architecture. 3D image render is highly computat...
Javier Davila, Alfonso de Torres, Jose Manuel Sanc...
DATE
2010
IEEE
151views Hardware» more  DATE 2010»
14 years 1 months ago
A GPU based implementation of Center-Surround Distribution Distance for feature extraction and matching
The release of general purpose GPU programming environments has garnered universal access to computing performance that was once only available to super-computers. The availability...
Aditi Rathi, Michael DeBole, Weina Ge, Robert T. C...
ICVS
2001
Springer
14 years 1 months ago
A Fault-Tolerant Distributed Vision System Architecture for Object Tracking in a Smart Room
Abstract. In recent years, distributed computer vision has gained a lot of attention within the computer vision community for applications such as video surveillance and object tra...
Deepak R. Karuppiah, Zhigang Zhu, Prashant J. Shen...
ICIP
2003
IEEE
14 years 10 months ago
Embedded co-processor architecture for CMOS based image acquisition
This paper describes a new co-processor architecture designed for CMOS sensor imaging. The co-processor unit is integrated into the image acquisition loop so as to exploit the ful...
Julien Dubois, Marco Mattavelli