471 search results - page 25 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
SBACPAD
2008
IEEE
14 years 3 months ago
2008
IEEE
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
IPPS
1994
IEEE
14 years 24 days ago
1994
IEEE
Present-day parallel computers often face the problems of large software Overheadsfor process switching and interprocessor communication. These problems are addressed by the Multi...
ESTIMEDIA
2004
Springer
14 years 2 months ago
2004
Springer
We proposed a hardware accelerator IP for the Tier-1 portion of Embedded Block Coding with Optimal Truncation (EBCOT) used in the JPEG2000 next generation image compression standa...
IPPS
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper develops a plug-and-play reusable LogGP model that can be used to predict the runtime and scaling behavior of different MPI-based pipelined wavefront applications runni...