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NETWORK
2007
100views more  NETWORK 2007»
13 years 8 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...
VLSISP
2008
132views more  VLSISP 2008»
13 years 8 months ago
Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
Brian M. H. Li, Philip Heng Wai Leong
ICPP
2000
IEEE
14 years 1 months ago
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel
MATLAB is one of the most popular languages for desktop numerical computations as well as for signal and image processing applic ations. Applying parallel processing techniques to...
Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramo...
FPL
2006
Springer
135views Hardware» more  FPL 2006»
14 years 11 days ago
FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems
A field-programmable gate array (FPGA) implementation of a new detection algorithm for uncoded multiple inputmultiple output (MIMO) systems based on the complex version of the sph...
Luis G. Barbero, John S. Thompson
DATE
2003
IEEE
131views Hardware» more  DATE 2003»
14 years 2 months ago
High Speed and Highly Testable Parallel Two-Rail Code Checker
In this article we propose a high speed and highly testable parallel two-rail code checker, which features a compact structure and is Totally-Self-Checking or Strongly Code-Disjoi...
Martin Omaña, Daniele Rossi, Cecilia Metra