471 search results - page 74 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
System-on-chip (SoC) designs use bus protocols for high performance data transfer among the Intellectual Property (IP) cores. These protocols incorporate advanced features such as...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
We discuss an imaging architecture for sensor pixel in the ALOHA signals an event when a certain amount network applications, that employs a 32 x 32 Address-Event of photons are re...
DSN
2007
IEEE
14 years 3 months ago
2007
IEEE
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
VRST
2005
ACM
14 years 2 months ago
2005
ACM
Much work has been done on the development of laser pointers as interaction devices. Typically a camera captures images of a display surface and extracts a laser pointer dot locat...
ICS
2004
Tsinghua U.
14 years 2 months ago
2004
Tsinghua U.
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...