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ASIACRYPT
2001
Springer
14 years 53 min ago
A Compact Rijndael Hardware Architecture with S-Box Optimization
Compact and high-speed hardware architectures and logic optimization methods for the AES algorithm Rijndael are described. Encryption and decryption data paths are combined and all...
Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji M...
EUROPAR
2001
Springer
13 years 12 months ago
A Software Architecture for User Transparent Parallel Image Processing on MIMD Computers
Abstract. This paper describes a software architecture that allows image processing researchers to develop parallel applications in a transparent manner. The architecture’s main ...
Frank J. Seinstra, Dennis Koelma, Jan-Mark Geusebr...
TVCG
2012
182views Hardware» more  TVCG 2012»
11 years 10 months ago
ISP: An Optimal Out-of-Core Image-Set Processing Streaming Architecture for Parallel Heterogeneous Systems
—Image population analysis is the class of statistical methods that plays a central role in understanding the development, evolution and disease of a population. However, these t...
Linh K. Ha, Jens Krüger, João Luiz Dih...
WSCG
2003
273views more  WSCG 2003»
13 years 8 months ago
Towards Feature-Based Building Reconstruction from Images
This paper presents a feature-based approach to piecewise planar modeling of architectural scenes from an oriented image sequence. An improved line detection algorithm is presente...
Konrad Schindler, Joachim Bauer
VISUALIZATION
1999
IEEE
13 years 11 months ago
Accelerating 3D Convolution Using Graphics Hardware
Many volume filtering operations used for image enhancement, data processing or feature detection can be written in terms of threedimensional convolutions. It is not possible to y...
Matthias Hopf, Thomas Ertl