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IPPS
2000
IEEE
13 years 12 months ago
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
Xianfeng Zhou, Margaret Martonosi
HIPC
2009
Springer
13 years 5 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
HPCA
2006
IEEE
14 years 7 months ago
A decoupled KILO-instruction processor
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
Miquel Pericàs, Adrián Cristal, Rube...
SIGSOFT
2005
ACM
14 years 8 months ago
Context- and path-sensitive memory leak detection
We present a context- and path-sensitive algorithm for detecting memory leaks in programs with explicit memory management. Our leak detection algorithm is based on an underlying e...
Yichen Xie, Alexander Aiken
ICDCS
2009
IEEE
14 years 2 months ago
Explicit Batching for Distributed Objects
Although distributed object systems, for example RMI and CORBA, enable object-oriented programs to be easily distributed across a network, achieving acceptable performance usually...
Eli Tilevich, William R. Cook, Yang Jiao