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» A Parallel Packet Screen for High Speed Networks
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CN
2006
161views more  CN 2006»
13 years 8 months ago
A multimedia traffic modeling framework for simulation-based performance evaluation studies
The emergence of high-speed communication systems has enabled the support of complex multimedia applications. The traffic patterns generated by such applications are likely to be ...
Assen Golaup, Hamid Aghvami
IPPS
2006
IEEE
14 years 2 months ago
Design and analysis of matching circuit architectures for a closest match lookup
— This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a sea...
Kieran McLaughlin, Friederich Kupzog, Holger Blume...
HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
IJCNN
2006
IEEE
14 years 2 months ago
Implementing Synaptic Plasticity in a VLSI Spiking Neural Network Model
— This paper describes an area-efficient mixed-signal implementation of synapse-based long term plasticity realized in a VLSI1 model of a spiking neural network. The artificial...
Johannes Schemmel, Andreas Grübl, Karlheinz M...
INFOCOM
2007
IEEE
14 years 3 months ago
Small Active Counters
— The need for efficient counter architecture has arisen for the following two reasons. Firstly, a number of data streaming algorithms and network management applications requir...
Rade Stanojevic