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» A Parallel Priority Queue with Constant Time Operations
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MST
2011
200views Hardware» more  MST 2011»
13 years 2 months ago
Performance of Scheduling Policies in Adversarial Networks with Non-synchronized Clocks
In this paper we generalize the Continuous Adversarial Queuing Theory (CAQT) model [5] by considering the possibility that the router clocks in the network are not synchronized. W...
Antonio Fernández Anta, José Luis L&...
IEEEPACT
2008
IEEE
14 years 1 months ago
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
We present a novel mechanism, called meeting point thread characterization, to dynamically detect critical threads in a parallel region. We define the critical thread the one with...
Qiong Cai, José González, Ryan Rakvi...
HPCA
2004
IEEE
14 years 7 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
LCN
1994
IEEE
13 years 11 months ago
The Packet Starvation Effect in CSMA/CD LANs and a Solution
In this paper we explore the packet starvation effect (PSE) that occurs in Ethernet controllers due to the unfairness of the CSMA/CD algorithm. The PSE causes some packets to expe...
Brian Whetten, Stephen Steinberg, Domenico Ferrari
CONCURRENCY
2006
140views more  CONCURRENCY 2006»
13 years 7 months ago
An efficient memory operations optimization technique for vector loops on Itanium 2 processors
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
William Jalby, Christophe Lemuet, Sid Ahmed Ali To...