231 search results - page 2 / 47 » A Parallel State Assignment Algorithm for Finite State Machi... |
122
Voted
IPPS
2009
IEEE
15 years 8 months ago
2009
IEEE
Given a set of n different deterministic finite state machines (DFSMs) modeling a distributed system, we examine the problem of tolerating f crash or Byzantine faults in such a ...
129
Voted
DAC
1996
ACM
15 years 6 months ago
1996
ACM
Abstract-- This paper proposes a state reduction algorithm for incompletely specified FSMs. The algorithm is based on iterative improvements. When the number of compatibles is like...
106
Voted
IPPS
2003
IEEE
15 years 7 months ago
2003
IEEE
Performance obtained with existing library-based parallelization tools for implementing high performance image processing applications is often sub-optimal. This is because inter-...
111
Voted
VLSID
1997
IEEE
15 years 6 months ago
1997
IEEE
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
114
Voted
GECCO
2006
Springer
15 years 5 months ago
2006
Springer
A Genetic Algorithm, embedded in a simulation-based method, is applied to the identification of Asynchronous Finite State Machines. Two different coding schemes and their associat...