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IPPS
2006
IEEE
14 years 2 months ago
Parallel FPGA-based all-pairs shortest-paths in a directed graph
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
PPOPP
1991
ACM
14 years 9 days ago
Coarse-Grain Parallel Programming in Jade
This paper presents Jade, a language which allows a programmer to easily express dynamic coarse-grain parallelism. Starting with a sequential program, a programmer augments those ...
Monica S. Lam, Martin C. Rinard
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
14 years 3 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
HIPC
2005
Springer
14 years 2 months ago
Application of Reduce Order Modeling to Time Parallelization
We recently proposed a new approach to parallelization, by decomposing the time domain, instead of the conventional space domain. This improves latency tolerance, and we demonstrat...
Ashok Srinivasan, Yanan Yu, Namas Chandra
APCSAC
2005
IEEE
14 years 2 months ago
Speculative Issue Logic
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
You-Jan Tsai, Jong-Jiann Shieh