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HPCA
2006
IEEE
14 years 9 months ago
The common case transactional behavior of multithreaded programs
Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...
TPDS
2002
105views more  TPDS 2002»
13 years 8 months ago
HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
Phil May, Santithorn Bunchua, D. Scott Wills
HPDC
2009
IEEE
14 years 3 months ago
Maintaining reference graphs of globally accessible objects in fully decentralized distributed systems
Since the advent of electronic computing, the processors’ clock speed has risen tremendously. Now that energy efficiency requirements have stopped that trend, the number of proc...
Björn Saballus, Thomas Fuhrmann
TRIDENTCOM
2006
IEEE
14 years 2 months ago
A testbed demonstrating optical IP switching (OIS) in disaggregated network architectures
: The lack of a unified control plane does not allow current optical networks to dynamically provision new optical paths. The IETF standardization body has proposed the Generalized...
Marco Ruffini, Donal O'Mahony, Linda Doyle
GRAPHICSINTERFACE
2011
13 years 9 days ago
Ubiquitous cursor: a comparison of direct and indirect pointing feedback in multi-display environments
Multi-display environments (MDEs) connect several displays into a single digital workspace. One of the main problems to be solved in an MDE’s design is how to enable movement of...
Robert Xiao, Miguel A. Nacenta, Regan L. Mandryk, ...