371 search results - page 32 / 75 » A Precedence PEPA Model for Performance and Reliability Anal... |
CODES
2009
IEEE
14 years 12 days ago
2009
IEEE
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
SIGMETRICS
2008
ACM
13 years 7 months ago
2008
ACM
Burstiness and temporal dependence in service processes are often found in multi-tier architectures and storage devices and must be captured accurately in capacity planning models...
DFT
2003
IEEE
14 years 1 months ago
2003
IEEE
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
CLEF
2007
Springer
14 years 1 months ago
2007
Springer
We describe cross language retrieval experiments using Amharic queries and English language document collection from our participation in the bilingual ad hoc track at the CLEF 20...
ICCD
2007
IEEE
14 years 2 months ago
2007
IEEE
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...