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» A Probabilistic Approach to Buffer Insertion
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ASPDAC
2005
ACM
79views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Floorplan management: incremental placement for gate sizing and buffer insertion
Incremental physical design is an important methodology towards achieving design closure for high-performance large-scale circuits. Placement tools must accommodate incremental ch...
Chen Li 0004, Cheng-Kok Koh, Patrick H. Madden
DAC
1998
ACM
13 years 11 months ago
Buffer Insertion for Noise and Delay Optimization
Interconnect-driven optimization is an increasingly important step in high-performance design. Algorithms for buffer insertion have been successfully utilized to reduce delay in gl...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
ICCD
2004
IEEE
119views Hardware» more  ICCD 2004»
14 years 3 months ago
Simultaneous Shield and Buffer Insertion for Crosstalk Noise Reduction in Global Routing
We present a method for incorporating crosstalk reduction criteria into global routing under an innovative power supply architecture, while considering the constraints imposed by ...
Tianpei Zhang, Sachin S. Sapatnekar
ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
14 years 3 months ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
ISPD
2006
ACM
90views Hardware» more  ISPD 2006»
14 years 29 days ago
Fast buffer insertion considering process variations
Advanced process technologies call for a proactive consideration of process variations in design to ensure high parametric timing yield. Despite of its popular use in almost any h...
Jinjun Xiong, Lei He