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CODES
2008
IEEE
13 years 9 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
ICCS
2009
Springer
14 years 2 months ago
Modular, Fine-Grained Adaptation of Parallel Programs
We present a modular approach to realizing fine-grained adaptation of program behavior in a parallel environment. Using a compositional framework based on function call intercepti...
Pilsung Kang 0002, Naresh K. C. Selvarasu, Naren R...
FASE
2001
Springer
14 years 5 days ago
A Hoare Calculus for Verifying Java Realizations of OCL-Constrained Design Models
Abstract. The Object Constraint Language OCL offers a formal notation for constraining the modelling elements occurring in UML diagrams. In this paper we apply OCL for developing ...
Bernhard Reus, Martin Wirsing, Rolf Hennicker
DAC
1998
ACM
14 years 8 months ago
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
COR
2007
176views more  COR 2007»
13 years 7 months ago
Scheduling and routing of automated guided vehicles: A hybrid approach
We propose a hybrid method designed to solve a problem of dispatching and conflict free routing of automated guided vehicles (AGVs) in a flexible manufacturing system (FMS). Thi...
Ayoub Insa Corréa, André Langevin, L...