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FCCM
2007
IEEE
111views VLSI» more  FCCM 2007»
14 years 3 months ago
A Structural Object Programming Model, Architecture, Chip and Tools for Reconfigurable Computing
A new platform for reconfigurable computing has an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. The platform is ...
Michael Butts, Anthony Mark Jones, Paul Wasson
AGP
1995
IEEE
14 years 8 days ago
Constraint Systems for Pattern Analysis of Constraint Logic-Based Languages
Pattern analysis consists in determining the shape of the set of solutions of the constraint store at some program points. Our basic claim is that pattern analyses can all be desc...
Roberto Bagnara
CORR
2010
Springer
158views Education» more  CORR 2010»
13 years 3 months ago
Efficient Approaches for Designing Fault Tolerant Reversible Carry Look-Ahead and Carry-Skip Adders
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
DAC
1998
ACM
14 years 9 months ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
FUIN
2007
110views more  FUIN 2007»
13 years 8 months ago
Controllable Delay-Insensitive Processes
Abstract. Josephs and Udding’s DI-Algebra offers a convenient way of specifying and verifying designs that must rely upon delay-insensitive signalling between modules (asynchrono...
Mark B. Josephs, Hemangee K. Kapoor