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GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
14 years 29 days ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
DASFAA
2005
IEEE
209views Database» more  DASFAA 2005»
14 years 1 months ago
PADS: Protein Structure Alignment Using Directional Shape Signatures
A novel approach for similarity search on the protein structure databases is proposed. PADS (Protein Alignment by Directional shape Signatures) incorporates the three dimensional ...
S. Alireza Aghili, Divyakant Agrawal, Amr El Abbad...
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
DIALM
2005
ACM
130views Algorithms» more  DIALM 2005»
13 years 9 months ago
On lower bounds for MAC layer contention in CSMA/CA-based wireless networks
Wireless LANs operating within unlicensed frequency bands require random access schemes such as CSMA/CA, so that wireless networks from different administrative domains (for exam...
Frank A. Zdarsky, Ivan Martinovic, Jens B. Schmitt
LCPC
2007
Springer
14 years 1 months ago
Associative Parallel Containers in STAPL
The Standard Template Adaptive Parallel Library (stapl) is a parallel programming framework that extends C++ and stl with support for parallelism. stapl provides a collection of pa...
Gabriel Tanase, Chidambareswaran Raman, Mauro Bian...