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FCCM
2005
IEEE
124views VLSI» more  FCCM 2005»
14 years 1 months ago
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA
The CLA-EC is a model obtained by combining the concepts of cellular learning automata and evolutionary algorithms. The parallel structure of the CLA-EC makes it suitable for hard...
Arash Hariri, Reza Rastegar, Morteza Saheb Zamani,...
IPPS
2003
IEEE
14 years 20 days ago
Task Pool Teams for Implementing Irregular Algorithms on Clusters of SMPs
The characteristics of irregular algorithms make a parallel implementation difficult, especially for PC clusters or clusters of SMPs. These characteristics may include an unpredi...
Judith Hippold, Gudula Rünger
IPPS
2007
IEEE
14 years 1 months ago
A Multi-Level Parallel Implementation of a Program for Finding Frequent Patterns in a Large Sparse Graph
Graphs capture the essential elements of many problems broadly defined as searching or categorizing. With the rapid increase of data volumes from sensors, many application discipl...
Steve Reinhardt, George Karypis
HPCS
2005
IEEE
14 years 1 months ago
Parallel Lattice Implementation for Option Pricing under Mixed State-Dependent Volatility Models
— With the principal goal of developing an alternative, relatively simple and tractable pricing framework for accurately reproducing a market implied volatility surface, this pap...
Giuseppe Campolieti, Roman Makarov
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
14 years 1 months ago
Non-fractional parallelism in LDPC decoder implementations
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
John Dielissen, Andries Hekstra