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» A Provably Correct Compiler Generator
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TCAD
2008
127views more  TCAD 2008»
13 years 7 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
13 years 7 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
PLDI
2011
ACM
12 years 10 months ago
Understanding POWER multiprocessors
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
Susmit Sarkar, Peter Sewell, Jade Alglave, Luc Mar...
ICS
1999
Tsinghua U.
13 years 12 months ago
Eliminating synchronization bottlenecks in object-based programs using adaptive replication
This paper presents a technique, adaptive replication, for automatically eliminating synchronization bottlenecks in multithreaded programs that perform atomic operations on object...
Martin C. Rinard, Pedro C. Diniz
ICCS
2007
Springer
13 years 11 months ago
Building Verifiable Sensing Applications Through Temporal Logic Specification
Abstract. Sensing is at the core of virtually every DDDAS application. Sensing applications typically involve distributed communication and coordination over large self-organized n...
Asad Awan, Ahmed H. Sameh, Suresh Jagannathan, Ana...