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ISMVL
2009
IEEE
189views Hardware» more  ISMVL 2009»
14 years 5 months ago
A Quaternary Decision Diagram Machine and the Optimization of its Code
We show the advantage of Quarternary Decision Diagrams (QDDs) in representing and evaluating logic functions. That is, we show how QDDs are used to implement QDD machines, which y...
Tsutomu Sasao, Hiroki Nakahara, Munehiro Matsuura,...
IEICET
2010
103views more  IEICET 2010»
13 years 9 months ago
A Quaternary Decision Diagram Machine: Optimization of Its Code
Tsutomu Sasao, Hiroki Nakahara, Munehiro Matsuura,...
ARC
2009
Springer
102views Hardware» more  ARC 2009»
14 years 5 months ago
A Parallel Branching Program Machine for Emulation of Sequential Circuits
The parallel branching program machine (PBM128) consists of 128 branching program machines (BMs) and a programmable interconnection. To represent logic functions on BMs, we use qua...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura,...
ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
14 years 3 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
LCPC
2005
Springer
14 years 4 months ago
Analytic Models and Empirical Search: A Hybrid Approach to Code Optimization
Compilers employ system models, sometimes implicitly, to make code optimization decisions. These models are analytic; they reflect their implementor’s understanding and beliefs ...
Arkady Epshteyn, María Jesús Garzar&...