Sciweavers

101 search results - page 9 / 21
» A RDT-Based Interconnection Network for Scalable Network-on-...
Sort
View
SAINT
2002
IEEE
14 years 13 days ago
A Design of a Next Generation IX using MPLS Technology
An IX (Internet eXchange) is a mechanism to interconnect many networks to each other. Currently, an ISP (Internet Service Provider) establishes numerous interconnections to other ...
Ikuo Nakagawa, Hiroshi Esaki, Kenichi Nagami
NOCS
2010
IEEE
13 years 5 months ago
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs
The number of cores present on-chip is increasing rapidly. The on-chip network that connects these cores needs to scale efficiently. The topology of on-chip networks is an importan...
Chia-Hsin Owen Chen, Niket Agarwal, Tushar Krishna...
CONEXT
2006
ACM
14 years 1 months ago
Reconciling zero-conf with efficiency in enterprises
A conventional enterprise or campus network comprises Ethernet-based IP subnets interconnected by routers. Although each subnet runs with minimal (or zero) configuration by virtue...
Chang Kim, Jennifer Rexford
CDES
2008
166views Hardware» more  CDES 2008»
13 years 9 months ago
Scalable Directory Organization for Tiled CMP Architectures
Although directory-based cache coherence protocols are the best choice when designing chip multiprocessor architectures (CMPs) with tens of processor cores on chip, the memory ove...
Alberto Ros, Manuel E. Acacio, José M. Garc...
FCCM
2006
IEEE
131views VLSI» more  FCCM 2006»
14 years 1 months ago
Packet Switched vs. Time Multiplexed FPGA Overlay Networks
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...
Nachiket Kapre, Nikil Mehta, Michael DeLorimier, R...