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DAC
2009
ACM
14 years 8 months ago
Process variation characterization of chip-level multiprocessors
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
Lide Zhang, Lan S. Bai, Robert P. Dick, Li Shang, ...
DAC
1997
ACM
13 years 12 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
ICS
2004
Tsinghua U.
14 years 1 months ago
Applications of storage mapping optimization to register promotion
Storage mapping optimization is a flexible approach to folding array dimensions in numerical codes. It is designed to reduce the memory footprint after a wide spectrum of loop tr...
Patrick Carribault, Albert Cohen
RTSS
2008
IEEE
14 years 2 months ago
Merging State and Preserving Timing Anomalies in Pipelines of High-End Processors
Many embedded systems are subject to temporal constraints that require advance guarantees on meeting deadlines. Such systems rely on static analysis to safely bound worst-case exe...
Sibin Mohan, Frank Mueller
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
13 years 12 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...