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» A Scalable Architecture for Montgomery Multiplication
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ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
13 years 9 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
ISCAS
2002
IEEE
112views Hardware» more  ISCAS 2002»
14 years 14 days ago
Tradeoff analysis of FPGA based elliptic curve cryptography
FPGAs are an attractive platform for elliptic curve cryptography hardware. Since field multiplication is the most critical operation in elliptic curve cryptography, we have studi...
Marcus Bednara, M. Daldrup, Jürgen Teich, Joa...
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
14 years 25 days ago
FPGA-Based Implementation of a Serial RSA Processor
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...
Antonino Mazzeo, Luigi Romano, Giacinto Paolo Sagg...
CCGRID
2005
IEEE
14 years 1 months ago
Distributed market broker architecture for resource aggregation in grid computing environments
In order to allow every user to extract aggregated computational power from idle PCs in the Internet, we propose a distributed architecture to achieve a market based resource shar...
Morihiko Tamai, Naoki Shibata, Keiichi Yasumoto, M...
COMSWARE
2007
IEEE
14 years 1 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy