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ANSS
2004
IEEE
13 years 11 months ago
Cache Simulation Based on Runtime Instrumentation for OpenMP Applications
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
Jie Tao, Josef Weidendorfer
VLSID
2004
IEEE
170views VLSI» more  VLSID 2004»
14 years 7 months ago
On-chip networks: A scalable, communication-centric embedded system design paradigm
As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts...
Jörg Henkel, Srimat T. Chakradhar, Wayne Wolf
ERSA
2006
161views Hardware» more  ERSA 2006»
13 years 8 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
IPPS
2007
IEEE
14 years 1 months ago
MultiEdge: An Edge-based Communication Subsystem for Scalable Commodity Servers
At the core of contemporary high performance computer systems is the communication infrastructure. For this reason, there has been a lot of work on providing low-latency, high-ban...
Sven Karlsson, Stavros Passas, George Kotsis, Ange...
FPGA
2011
ACM
330views FPGA» more  FPGA 2011»
12 years 11 months ago
CoRAM: an in-fabric memory architecture for FPGA-based computing
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
Eric S. Chung, James C. Hoe, Ken Mai