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» A Scalable FPGA-based Multiprocessor
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MOBICOM
2009
ACM
14 years 3 months ago
A scalable micro wireless interconnect structure for CMPs
This paper describes an unconventional way to apply wireless networking in emerging technologies. It makes the case for using a two-tier hybrid wireless/wired architecture to inte...
Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, So...
IPPS
2005
IEEE
14 years 2 months ago
Characterizing Secure Dynamic Web Applications Scalability
Security in the access to web contents and the interaction with web sites is becoming one of the most important issues in Internet. Servers need to provide certain levels of secur...
Jordi Guitart, Vicenç Beltran, David Carrer...
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
14 years 1 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
13 years 10 days ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
IPPS
1996
IEEE
14 years 24 days ago
Benefits of Processor Clustering in Designing Large Parallel Systems: When and How?
Advances in multiprocessor interconnect technologyare leading to high performance networks. However, software overheadsassociated with message passing are limiting the processors ...
Debashis Basak, Dhabaleswar K. Panda, Mohammad Ban...