1234 search results - page 100 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
RTAS
2007
IEEE
15 years 9 months ago
2007
IEEE
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
129
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HIPEAC
2007
Springer
15 years 9 months ago
2007
Springer
Abstract. Network processors are programmable devices that can process packets at a high speed. A network processor is typified by multithreading and heterogeneous multiprocessing...
191
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DATE
2011
IEEE
14 years 6 months ago
2011
IEEE
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
127
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ISLPED
1995
ACM
15 years 6 months ago
1995
ACM
ABSTRACT { Sub-micron technologies and the increasing size and complexity of integrated components have aggravated the e ect of long interconnects and buses, compared to that of ga...
149
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EMSOFT
2011
Springer
14 years 2 months ago
2011
Springer
As system integration becomes an increasingly important challenge for complex real-time systems, there has been a significant demand for supporting real-time systems in virtualiz...