1234 search results - page 11 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
PPL
2008
13 years 7 months ago
2008
The latency of broadcast/reduction operations has a significant impact on the performance of SIMD processors. This is especially true for associative programs, which make extensiv...
LCPC
2009
Springer
14 years 4 days ago
2009
Springer
This paper improves our previous research effort [1] by providing an efficient method for kernel loop unrolling minimisation in the case of already scheduled loops, where circular...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
MICRO
2005
IEEE
14 years 1 months ago
2005
IEEE
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...