Sciweavers

1234 search results - page 139 / 247
» A Scheduling and Pipelining Algorithm for Hardware Software ...
Sort
View
CODES
2007
IEEE
14 years 2 months ago
A low power VLIW processor generation method by means of extracting non-redundant activation conditions
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuc...
DELTA
2006
IEEE
13 years 11 months ago
Implementation of Four Real-Time Software Defined Receivers and a Space-Time Decoder using Xilinx Virtex 2 Pro Field Programmabl
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
Peter J. Green, Desmond P. Taylor
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
14 years 2 months ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee
ISPASS
2003
IEEE
14 years 1 months ago
Performance study of a cluster runtime system for dynamic interactive stream-oriented applications
Emerging application domains such as interactive vision, animation, and multimedia collaboration display dynamic scalable parallelism, and high computational requirements, making ...
Arnab Paul, Nissim Harel, Sameer Adhikari, Bikash ...
DMG
2005
Springer
14 years 1 months ago
An Adaptive Distributed Query Processing Grid Service
Grid services provide an important abstract layer on top of heterogeneous components (hardware and software) that take part into a grid environment. We are developing a data grid s...
Fabio Porto, Vinícius F. V. da Silva, M&aac...